Synopsys and Chinese Academy of Sciences Collaborate on System-on-Chip Laboratory; Synopsys to Provide Design and Education Resources for 0.13-micron Technology

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--March 24, 2003--Synopsys, Inc. (Nasdaq:SNPS), the world leader in integrated circuit (IC) design software, and the Chinese Academy of Sciences (CAS) today announced they have signed an agreement to build an advanced system-on-chip (SoC) laboratory in Beijing. The lab will be the first facility of its kind offered by CAS and an electronic design automation (EDA) provider in mainland China. The lab will use Synopsys' leading design implementation and verification tools to provide CAS with design and education resources to develop ICs at 0.13-micron. Training and use of the SoC lab will be offered to researchers and graduate students at the more than 10 institutes CAS supports. After the technical lab is established, Synopsys and CAS plan to discuss future cooperation on joint development with respect to 0.09-micron IC design technology and flow. By providing extended opportunities for training and research in advanced IC design, CAS and Synopsys are helping fuel the growth of the next generation of China's IC design industry.

Under the agreement, Synopsys will provide CAS with complete design solutions and services, including an intellectual property (IP) library and front- and back-end tools within Synopsys' Verification Platform and Galaxy(TM) Design Platform. Tools provided to CAS include Physical Compiler(R), Floorplan Compiler, VCS(TM), Hercules(TM), Cosmos(TM), NanoSim(TM) and Astro(TM). Synopsys will also provide the laboratory with technical support and training services. As a result, CAS will standardize its next-generation deep-submicron golden flow based on Synopsys tools. The newly established EDA Center of CAS will be responsible for the implementation of the collaborative plan.

"Synopsys is a technology leader committed to promoting China's IC design industry by helping train China's future IC design workforce and by supporting research in China on 0.13-micron IC design technology," said Gui Wenzhuang, director general of the High Technology Bureau of CAS. "Our strategic partnership with Synopsys enables us to set up a world-class research and development environment that will serve as a critical base camp for highly qualified designers in the IC design field. By providing IC designers with essential training and a good research environment, Synopsys and CAS will offer support for the development of the IC industry of China."

At present, the majority of IC designs in China are still using 0.35-micron process technology, and only a very few advanced products have begun to use 0.18-micron technology. The Synopsys/CAS agreement will help CAS establish a technology lab to address design issues at 0.13-micron. The parties will establish a technical committee composed of senior technical experts to ensure research quality and training capabilities of the lab. Synopsys will provide training and technical support for the lab.

"Synopsys plans to help China's electronics industry fulfill its potential by sharing our passion for leading-edge design," said Chi-Foon Chan, president and chief operating officer at Synopsys, Inc. "This agreement will allow us to provide the tools, training and support that China needs to become a competitor in 0.13-micron process technology. This is a continuation of a long and fruitful relationship between Synopsys and China. We hope the work done in the newly established labs will lead to adoption by other research institutes and the commercial world."

As part of its long-standing commitment to the region, Synopsys has been helping to accelerate the growth of the China IC design industry since 1995.

Synopsys Galaxy Design Platform

Galaxy Design Platform integrates Synopsys' industry-leading IC implementation tools and intellectual property (IP), including Design Compiler(R), DFT Compiler(TM), Power Compiler, DesignWare(R), Floorplan Compiler, Physical Compiler, Astro, PrimeTime(R), TetraMAX(R), Star-RCXT(TM), Hercules and Proteus(TM). Galaxy Design Platform incorporates consistent timing, common libraries, delay calculation and constraints from RTL all the way to silicon using the production-proven Milkyway(TM) database. In addition, Galaxy offers designers the flexibility to integrate internally developed and third-party tools through the open APIs within the Milkyway design database. Synopsys Galaxy Design Platform integration is currently in limited customer availability. General availability will begin in June 2003.

Synopsys Verification Platform

The Synopsys Verification Platform is a unified environment that provides high performance and efficiency of interaction among all platform components, including mixed-HDL simulation, mixed-signal, system-level verification, assertions, code coverage, functional coverage, testbenches and formal analysis. Synopsys verification platform supports Verilog, VHDL, mixed-HDL, SystemC and mixed-signal simulation for complex SoC designs. Aimed at achieving high levels of verification productivity, the verification platform includes Synopsys VCS(TM) HDL and mixed-HDL simulator, CoCentric(R) System Studio for system-level verification, LEDA(R) programmable checker, Vera(R) testbench automation tool, DesignWare(R) Verification IP, VCS-NanoSim(TM) and VCS-HSPICE for mixed-signal simulation, and Formality(R) equivalence checker.

About the Chinese Academy of Sciences (CAS)

The Chinese Academy of Sciences (CAS) is a leading academic institute and comprehensive research and development center for the natural and technological sciences and for high-tech innovation in China. It is the largest comprehensive national research and post-graduate educational institute, CAS has a total staff of more than 58,000, with approximately 39,000 research personnel and 18,000 graduate students. To meet the needs of China's fast growing IC industry for technologies and talents, the EDA Center of CAS was founded in November 2002 to provide a networked, open platform for CAS in the field of IC design research and education. The center provides services in the research and development of electronic system and IC design, training, technical support and MPW. It aims to drive the development of China's IC industry through strategic collaborations with EDA vendors, IP providers and Foundries.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic design automation (EDA) software for integrated circuit (IC) design. The company delivers technology-leading IC design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, Calif., and is located in more than 60 offices throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

Forward-Looking Statements

This press release contains forward-looking statements within the meaning of the safe harbor provisions of Section 21E of the Securities Exchange Act of 1934, including statements regarding the expected benefits of the agreement with CAS, Galaxy platform and the expected date of availability of the Galaxy platform. These statements are based on Synopsys' current expectations and beliefs. Actual results could differ materially from the results implied by these statements as a result of a number of factors including unforeseen difficulties encountered during the launch of the CAS SoC lab in integrating Synopsys individual point tools into an integrated platform and uncertainties attendant to any new product offering, as well as other factors contained in Synopsys' Annual Report on Form 10-K for the year ended Oct. 31, 2002.

CoCentric, Design Compiler, DesignWare, Formality, LEDA Physical Compiler, PrimeTime, TetraMAX and Vera are registered trademarks of Synopsys, Inc. Astro, Cosmos, DFT Compiler, Floorplan Compiler, Galaxy, Hercules, Milkyway, NanoSim, Power Compiler, Proteus, Star-RCXT and VCS are trademarks of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

CONTACT: Synopsys, Inc.
             Yvette Huygen, 650/584-4547 (United States)
             yvetteh@synopsys.com
             Joseph Soh, +65 6393-7122 (Asia-Pacific)
             joseph.soh@synopsys.com
             or
             Edelman Public Relations
             Li Cai, +86 10-8519-1588-227 (Asia-Pacific)
             li.cai@edelman.com
             or
             Chinese Academy of Sciences
             Ye Tian-Chun, +86 10-62007137 (Asia-Pacific)
             tcye@meccas.ue.ac.cn